Experimental and modelling study on delamination risks for refinished electronic packages under hot solder dip loads
- Submitting institution
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University of Greenwich
- Unit of assessment
- 12 - Engineering
- Output identifier
- 26888
- Type
- D - Journal article
- DOI
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10.1109/TCPMT.2020.2972635
- Title of journal
- IEEE Transactions on Components, Packaging and Manufacturing Technology
- Article number
- -
- First page
- 502
- Volume
- 10
- Issue
- 3
- ISSN
- 2156-3950
- Open access status
- Compliant
- Month of publication
- -
- Year of publication
- 2020
- URL
-
-
- Supplementary information
-
-
- Request cross-referral to
- -
- Output has been delayed by COVID-19
- No
- COVID-19 affected output statement
- -
- Forensic science
- No
- Criminology
- No
- Interdisciplinary
- No
- Number of additional authors
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4
- Research group(s)
-
-
- Proposed double-weighted
- No
- Reserve for an output with double weighting
- No
- Additional information
- Funded through a US Government Grant (H94003-04-D-003-0056/10 178956), this is the first time a combined experimental-modelling work, based on a novel dip-to-destroy test methodology, has been undertaken to obtain the actual stress safety margins for electronic components with different constructional design subjected to a robotic hot solder dip (rHSD). The validated damage models enable high reliability electronics manufacturers relying on rHSD to reduce/eliminate physical qualification testing with potential costs savings of ~ £100,000 per component (Paul Stewart, Lead Engineer, Leonardo MW, paul.stewart02@leonardocompany.com). Work has led onto further grants from US Government (H94003-04-D-0003-0070/10203863 and H94003-04-D-0003-0079/ 10210119, total funding $320,000).
- Author contribution statement
- -
- Non-English
- No
- English abstract
- -