Differential Capacitive Readout Circuit Using Oversampling Successive Approximation Technique
- Submitting institution
-
Teesside University
- Unit of assessment
- 12 - Engineering
- Output identifier
- 4219231
- Type
- D - Journal article
- DOI
-
10.1109/TCSI.2018.2849992
- Title of journal
- IEEE Transactions on Circuits and Systems I: Regular Papers
- Article number
- 8419076
- First page
- 4072
- Volume
- 65
- Issue
- 12
- ISSN
- 1549-8328
- Open access status
- Compliant
- Month of publication
- -
- Year of publication
- 2018
- URL
-
-
- Supplementary information
-
-
- Request cross-referral to
- -
- Output has been delayed by COVID-19
- No
- COVID-19 affected output statement
- -
- Forensic science
- No
- Criminology
- No
- Interdisciplinary
- No
- Number of additional authors
-
3
- Research group(s)
-
-
- Proposed double-weighted
- No
- Reserve for an output with double weighting
- No
- Additional information
- Minimising power consumption and chip area is a critical consideration in designing and implementing integrated circuits. This work designed a close loop Σ-Δ readout circuit using oversampling successive approximation technique to reduce gain error of an amplifier, resulting in the reduction of power consumption and chip area while the interference caused by charge injection and leakage current is also suppressed. The experimental tests from the prototype fabricated for differential capacitive readout circuit show that compared to other existing/competing methods, this new approach achieved a significant improvement of power consumption, chip area and interference suppression.
- Author contribution statement
- -
- Non-English
- No
- English abstract
- -