Weighted Round Robin Configuration for Worst-Case Delay Optimization in Network-on-Chip
- Submitting institution
-
Liverpool Hope University
- Unit of assessment
- 11 - Computer Science and Informatics
- Output identifier
- fFJ11C
- Type
- D - Journal article
- DOI
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10.1109/TVLSI.2016.2556007
- Title of journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Article number
- -
- First page
- 3387
- Volume
- 24
- Issue
- 12
- ISSN
- 1557-9999
- Open access status
- Compliant
- Month of publication
- May
- Year of publication
- 2016
- URL
-
-
- Supplementary information
-
-
- Request cross-referral to
- -
- Output has been delayed by COVID-19
- No
- COVID-19 affected output statement
- -
- Forensic science
- No
- Criminology
- No
- Interdisciplinary
- Yes
- Number of additional authors
-
2
- Research group(s)
-
I - Intelligent and Distributed Systems (IDS)
- Citation count
- 3
- Proposed double-weighted
- No
- Reserve for an output with double weighting
- No
- Additional information
- This paper is significant because it demonstrates, for the first time, how an appropriate weight allocation in a weighted round robin policy can be a valuable instrument to optimise the delay in on-chip network designs. This work automates all the analysis steps and provides a Design Optimisation Tool for designers to provide effective guarantees of real-time performance via intelligent sharing of resources. The results of this work have been used in the research project “Formal QoS Analysis and Control for Network-on-Chip Communication” funded by Intel Corporation. The approach proposed in this article has been considered for 5G cellular networks [DOI:10.1109/IACS.2018.8355442].
- Author contribution statement
- -
- Non-English
- No
- English abstract
- -