Transactions in relaxed memory architectures
- Submitting institution
-
The University of Surrey
- Unit of assessment
- 11 - Computer Science and Informatics
- Output identifier
- 9025839_4
- Type
- D - Journal article
- DOI
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10.1145/3158106
- Title of journal
- Proceedings of the ACM on Programming Languages
- Article number
- -
- First page
- 1
- Volume
- 2
- Issue
- POPL
- ISSN
- 2475-1421
- Open access status
- Compliant
- Month of publication
- -
- Year of publication
- 2017
- URL
-
-
- Supplementary information
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-
- Request cross-referral to
- -
- Output has been delayed by COVID-19
- No
- COVID-19 affected output statement
- -
- Forensic science
- No
- Criminology
- No
- Interdisciplinary
- No
- Number of additional authors
-
-
- Research group(s)
-
-
- Citation count
- -
- Proposed double-weighted
- No
- Reserve for an output with double weighting
- No
- Additional information
- We introduce a general architectural framework for the introduction of transactions into relaxed memory in hardware. This is significant because our framework incorporates flexible and expressive forms of transaction aborts and execution that have hitherto been in the realm of software transactional memory (STM). In contrast to STM, we account for the characteristics of relaxed memory, without a notion of global time. We prove abstraction theorems to demonstrate that the programmer API matches expected intuitions. This is general enough to encompass several models, e.g., Chong (Arm) et al have identified that these proofs carry over to ARMv8 models (PLDI 2018).
- Author contribution statement
- -
- Non-English
- No
- English abstract
- -