CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization
- Submitting institution
-
University College London
- Unit of assessment
- 11 - Computer Science and Informatics
- Output identifier
- 14020
- Type
- E - Conference contribution
- DOI
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10.1109/SP.2015.9
- Title of conference / published proceedings
- 2015 IEEE SYMPOSIUM ON SECURITY AND PRIVACY SP 2015
- First page
- 20
- Volume
- 2015-July
- Issue
- -
- ISSN
- 1081-6011
- Open access status
- Out of scope for open access requirements
- Month of publication
- May
- Year of publication
- 2015
- URL
-
-
- Supplementary information
-
-
- Request cross-referral to
- -
- Output has been delayed by COVID-19
- No
- COVID-19 affected output statement
- -
- Forensic science
- No
- Criminology
- No
- Interdisciplinary
- No
- Number of additional authors
-
14
- Research group(s)
-
-
- Citation count
- 32
- Proposed double-weighted
- No
- Reserve for an output with double weighting
- No
- Additional information
- This paper introduces and evaluates CHERI - a revolutionary new design for CPUs that incorporate security features to protect against some of the most frequent software vulnerabilities, with minimal loss to performance. In January 2019 ARM announced that they would be integrating features from CHERI into their new generation of processors. The CHERI design as implemented in the ARM Morello board, forms the foundation of the £187M Digital Security by Design Challenge (DSbD).
- Author contribution statement
- -
- Non-English
- No
- English abstract
- -