Design Tools for Implementing Self-Aware and Fault-Tolerant Systems on FPGAs
- Submitting institution
-
The University of Manchester
- Unit of assessment
- 11 - Computer Science and Informatics
- Output identifier
- 40101411
- Type
- D - Journal article
- DOI
-
10.1145/2617597
- Title of journal
- A C M Transactions on Reconfigurable Technology and Systems
- Article number
- -
- First page
- 1
- Volume
- 7
- Issue
- 2
- ISSN
- 1936-7406
- Open access status
- Out of scope for open access requirements
- Month of publication
- June
- Year of publication
- 2014
- URL
-
-
- Supplementary information
-
-
- Request cross-referral to
- -
- Output has been delayed by COVID-19
- No
- COVID-19 affected output statement
- -
- Forensic science
- No
- Criminology
- No
- Interdisciplinary
- No
- Number of additional authors
-
2
- Research group(s)
-
A - Computer Science
- Citation count
- 4
- Proposed double-weighted
- No
- Reserve for an output with double weighting
- No
- Additional information
- "This work provides the very first holistic approach for automatically building fault tolerant systems on FPGAs, including methods, tools, and a complete design flow for detecting defects and for compensating faults in FPGAs that considers defects in arbitrary logic and routing resources, but also in the infrastructure for integrating reconfigurable modules.
The approach is consequently important at the end of CMOS scaling for compensating chip imperfections.
Enabled a EUR20,000 donation and active collaboration with HTV GMBH Germany where the methodology enabled implementing secure singe-chip cryptography on reconfigurable FPGAs that was only possible with the presented tools."
- Author contribution statement
- -
- Non-English
- No
- English abstract
- -
